AI-Optimized VLSI Architecture for Energy-Efficient and Sustainable IoT Systems
Shujaatali Badami, Anshul Sharma1, Bhaskar Reddy*, Shailesh Kadam, Biky Chouhan and Brijeena Rana
The artificial intelligence (AI) and Internet of things (IoT) boom have caused the necessity to implement energy-efficient hardware platforms capable of delivering smart computations in real-time at the network border. Traditional VLSI design tooling can generally not be used to implement sustainable IoT designs, as they cannot realize high performance and low power consumption at the same time. It proposes an AI-Optimized VLSI Architecture, a design approach that uses machine learning-based design-space exploration and provides machine learning-based adaptive power management and energy harvesting schemes to achieve significant performance-per-watt advantages. The framework presented applies reinforcement learning, genetic algorithms and Bayesian optimization to optimize the parameters of synthesis and layout intelligently, maximizing power delay trade-offs. According to the simulations of Cadence and Synopsys design tools, the company has saved power by 43.3 percent, delay by 29.7 percent and energy by 52 percent compared to conventional VLSI systems. Further, the architecture incorporates dynamic voltage and frequency scaling (DVFS), clock gating, and AI-based power gating to achieve leakage and computation energy minimization that prolong device life in energy-constrained internet of things. This paper empirically demonstrates that allowing AI-directed optimization, the sustainability, scalability, and flexibility of next-generation clean-energy-based electronic systems can dramatically increase their viability.
